Amplifying circuit

ABSTRACT

The present invention provides an amplifying circuit capable of accomplishing high-impedance input/output, and providing a high gain and low power consumption. The amplifier amplifies a signal received through an input terminal, and outputs the signal through an output terminal. A control circuit comprised of the inductors, and the switches turns input/output impedances of the amplifier into a high impedance.

FIELD OF THE INVENTION

The invention relates to an amplifying circuit for amplifying ahigh-frequency signal, and further to a gain-variable amplifying circuitincluding a plurality of the amplifying circuits.

PRIOR ART

A gain-variable amplifying circuit is an important circuit in a wirelesscommunication system. With popularization of a mobile phone and anincrease in a data transmission rate in a wireless LAN system foradaptation to a multi-media system, such a gain-variable amplifyingcircuit is now required to be able to operate with smaller power andcontrol a gain more precisely.

FIG. 11 is a circuit diagram of an example of a conventionalgain-variable amplifying circuit.

The gain-variable amplifying circuit illustrated in FIG. 11 is comprisedof a variable attenuator 91, and an amplifier 92 electrically connectedin series to the variable attenuator 91. The illustrated gain-variableamplifying circuit controls an amplification rate by varying attenuationof the variable attenuator 91.

FIG. 12 is a circuit diagram of another example of a conventionalgain-variable amplifying circuit.

The gain-variable amplifying circuit illustrated in FIG. 12 is comprisedof a variable attenuator 93, an amplifier 94 electrically connected inparallel to the variable attenuator 93, and switches 95 ₁ and 95 ₂through which one of the variable attenuator 93 and the amplifier 94 isselected.

When the switches 95 ₁ and 95 ₂ are electrically connected to terminalsassociated with the amplifier 94, the amplifier 94 is selected (FIG. 12illustrates a condition where the amplifier 94 is selected). Incontrast, when the switches 95 ₁ and 95 ₂ are electrically connected toterminals associated with the variable attenuator 93, the variableattenuator 93 is selected

FIG. 13 is a circuit diagram of still another example of a conventionalgain-variable amplifying circuit, disclosed in Japanese PatentApplication Publication No. 2001-345653.

The gain-variable amplifying circuit illustrated in FIG. 13 is comprisedof a plurality of amplifiers 96 ₁ to 96 _(N), and a demodulator 97electrically connected in series to each of the amplifiers 96 ₁ to 96_(N). Each of the amplifiers 96 ₁ to 96 _(N) is designed to have a gaindifferent from gains of others.

In the illustrated gain-variable amplifying circuit, only an amplifiersuitable for providing a desired gain is turned on, and other amplifiersare turned off. As a result, the gain-variable amplifying circuittransmits an output having a high impedance, and the amplifiers turnedoff are electrically separated from the demodulator 97.

In the gain-variable amplifying circuit illustrated in FIG. 11, sincethe variable attenuator 91 is arranged in a first stage, a loss of thevariable attenuator 91 harmfully influences a noise index, and hence, itwould not be possible to have a better noise index.

In addition, since the amplifier 92 keeps carrying out amplification,power is consumed regardless of whether a desired amplification degreeis high or low, power. For instance, even if an input is high and henceit is not necessary to have a high amplification degree, the amplifier92 keeps carrying out amplification. Accordingly, in a device whichoperates with a battery having a limited lifetime, such as a mobileterminal, it would not be possible to extend a period of time duringwhich the device is usable.

Since the gain-variable amplifying circuit illustrated in FIG. 12includes a plurality of switches (specifically, two switches), it isnecessary to compensate for a loss caused by the switches by theamplifier 94 or an amplifier (not illustrated) arranged at a later stagein the gain-variable amplifying circuit. Thus, power consumption of thegain-variable amplifying circuit is increased.

In particular, a loss caused by the switches in a frequency band beyonda couple of GHz is quite high, and hence, power consumption necessaryfor having a desired gain would be further increased.

A frequency to which the gain-variable amplifying circuit illustrated inFIG. 13 can be applied is equal to or smaller than a couple of tens ofMHz, such as IF band. Each of the amplifiers 96 ₁ to 96 _(N) is designedto have a load resistance in the range of about 50 to about 200 ohms.However, since an impedance in an off-condition lowers because ofparasitic capacity of a semiconductor device, when a frequency is overGHz, an amplifier(s) turned off cannot transmit an output having asufficiently high impedance.

In order to broaden a variable range of a gain or to narrow a variablestep of a gain, it would be necessary to increase a number of amplifierselectrically connected in parallel to one another. However, a signal isnot transmitted to a next stage due to an impedance of an amplifier(s)turned off, resulting in reduction in a gain.

In view of the above-mentioned problems in the prior art, it is anobject of the present invention to provide an amplifying circuit capableof accomplishing high-impedance input/output, and providing a high gainin low power consumption.

It is also an object of the present invention to provide a gain-variableamplifying circuit including a plurality of the above-mentionedamplifying circuits, having superior noise characteristics, andproviding a broad band in which a gain is variable.

DISCLOSURE OF THE INVENTION

In order to accomplish the above-mentioned object, the present inventionprovides an amplifying circuit including an amplifier amplifying asignal received through an input terminal, and outputting the signalthrough an output terminal, and a control circuit turning at least oneof an input impedance and an output impedance of the amplifier into ahigh impedance.

In the amplifying circuit in accordance with the present invention, thecontrol circuit turns at least one of an input impedance and an outputimpedance of the amplifier into a high impedance. Hence, it would bepossible to select one of electrical connection and disconnectionwithout arranging a switch in a signal path, ensuring no loss caused byarranging a switch in a signal path.

For instance, the control circuit may be comprised of an inductor and aswitch, in which case, the inductor and the switch may be electricallyconnected in series to each other, and further electrically connected inan AC manner between the input or output terminal and a groundedvoltage.

The control circuit having the above-mentioned structure can cancelreduction in an impedance in a high-frequency band caused by a parasiticcapacity of the amplifier, with the inductor.

For instance, the switch is comprised of a field effect transistor.

It is preferable that the inductor has an inductance resonating inparallel with a parasitic capacity of the amplifier.

The inductor which resonates in parallel with a parasitic capacity ofthe amplifier at a particular frequency cancels reduction in animpedance in a high-frequency band caused by a parasitic capacity of theamplifier.

For instance, the control circuit may be comprised of at least twotransmission lines including at least a first transmission lineelectrically connected at one end thereof to the input or outputterminal, and a second transmission line grounded at one end thereof, atotal length of the at least two transmission lines being equal to K×Swherein K indicates an odd number, and S indicates a quarter of awavelength of the signal, and a switch for selecting whether the inputor output terminal is electrically connected to a grounded voltagethrough a transmission line having a length of K×S or through atransmission line having a length shorter than K×S.

It is preferable that the transmission line having a length shorter thanK×S acts as an inductor having an inductance resonating in parallel witha parasitic capacity of the amplifier.

For instance, the amplifier may be comprised of two field effecttransistors electrically connected in cascode to each other.

The amplifying circuit in accordance with the present invention mayfurther include a field effect transistor electrically connected inseries between the amplifier and a power source, in which case, thefield effect transistor interrupts a current from flowing to theamplifying circuit from the power source when the amplifying circuit isoff.

The amplifying circuit in accordance with the present invention may beconstructed as a differential amplifying circuit, in which case, theamplifying circuit further includes a field effect transistor as aconstant-current source between the amplifier and a grounded voltage.

The present invention further provides a gain-variable amplifyingcircuit comprising at least two amplifying circuits electricallyconnected in parallel to each other and having gains different from oneanother, the amplifying circuits each comprised of the above-mentionedamplifying circuits, wherein a gain is controlled by turning at leastone of the input and output impedances of any one of the at least twoamplifying circuits or an amplifying circuit(s) other than a selectedamplifying circuit, into a high impedance.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a circuit diagram of a gain-variable amplifying circuit inaccordance with an embodiment of the present invention.

FIG. 2 is a circuit diagram of a first example of an amplifying circuitas a part of the gain-variable amplifying circuit illustrated in FIG. 1.

FIG. 3 illustrates a principle about why the amplifying circuitillustrated in FIG. 2 is in a high-impedance condition.

FIG. 4 is a circuit diagram of a second example of an amplifying circuitas a part of the gain-variable amplifying circuit illustrated in FIG. 1.

FIG. 5 is a circuit diagram of a third example of an amplifying circuitas a part of the gain-variable amplifying circuit illustrated in FIG. 1.

FIG. 6 is a circuit diagram of a fourth example of an amplifying circuitas a part of the gain-variable amplifying circuit illustrated in FIG. 1.

FIG. 7 is a circuit diagram of a fifth example of an amplifying circuitas a part of the gain-variable amplifying circuit illustrated in FIG. 1.

FIG. 8(a) is a circuit diagram showing characteristics of an amplifyingcircuit as a part of the gain-variable amplifying circuit in accordancewith an embodiment of the present invention.

FIG. 8(b) is a circuit diagram showing characteristics of a conventionalgain-variable amplifying circuit.

FIG. 9 is a graph showing a relation between a frequency and a gain inthe gain-variable amplifying circuits illustrated in FIGS. 8(a) and8(b).

FIG. 10 is a graph showing a relation between a frequency and a noiseindication in the gain-variable amplifying circuits illustrated in FIGS.8(a) and 8(b).

FIG. 11 is a circuit diagram of an example of a conventionalgain-variable amplifying circuit.

FIG. 12 is a circuit diagram of another example of a conventionalgain-variable amplifying circuit.

FIG. 13 is a circuit diagram of still another example of a conventionalgain-variable amplifying circuit.

INDICATION BY REFERENCE NUMERALS

-   1000 Gain-variable amplifying circuit in accordance with an    embodiment of the present invention-   100 ₁-100 _(N) Amplifying circuit-   100A Amplifying circuit (First example)-   100B Amplifying circuit (Second example)-   100C Amplifying circuit (Third example)-   100D Amplifying circuit (Fourth example)-   100E Amplifying circuit (Fifth example)-   201 First inductor-   203 Second inductor-   204 Third inductor-   205 Fourth inductor-   206 Fifth inductor-   202 Resistor-   207 Capacitor-   208 First field effect transistor-   209 Second field effect transistor-   210 Third field effect transistor-   301, 303, 304, 305, 306 Inductor-   307, 320, 321 Capacitor-   400 Fourth field effect transistor-   401 Fifth field effect transistor-   601 a, 601 b, 603 a, 603 b, 604 a, 604 b, 605 a, 605 b, 606 a, 606 b    Inductor-   602 a, 602 b Resistor-   607 a, 607 b Capacitor-   608 a, 608 b, 609 a, 609 b, 610 a, 610 b, 611 a, 611 b Field effect    transistor-   613 Sixth field effect transistor-   721 First transmission line-   722 Second transmission line-   723 Third transmission line-   720 First field effect transistor-   724 Second field effect transistor-   725 Third field effect transistor-   726 Output matching circuit-   830, 832, 833 Amplifying circuit-   831 Attenuator-   IN Input terminal-   OUT Output terminal

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Preferred embodiments in accordance with the present invention will beexplained hereinbelow with reference to drawings.

FIG. 1 is a circuit diagram of a gain-variable amplifying circuit 1000in accordance with an embodiment of the present invention. Thegain-variable amplifying circuit 1000 in accordance with an embodimentof the present invention includes N amplifying circuits 100 ₁ to 100_(N) (N indicates an integer equal to or greater than 2). The Namplifying circuits 100 ₁ to 100 _(N) are electrically connected inparallel to one another between an input terminal IN and an outputterminal OUT.

Input terminals of the amplifying circuits 100 ₁ to 100 _(N) areelectrically connected to the input terminal N, and output terminals ofthe amplifying circuits 100 ₁ to 100 _(N) are electrically connected tothe output terminal OUT.

The amplifying circuits 100 ₁ to 100 _(N) are designed to have the samestructure as one another, but have gains different from one another.

Control voltages Vc1 to VcN applied to the amplifying circuits 100 ₁ to100 _(N), respectively, cause the amplifying circuits 100 ₁ to 100 _(N)to have a high impedance. Furthermore, the control voltages Vc1 to VcNmake it possible to select whether the amplifying circuits 100 ₁ to 100_(N) are electrically connected to the input terminal IN and the outputterminal OUT. Accordingly, it is possible for the gain-variableamplifying circuit 1000 to have a desired gain by selecting any one ofthe amplifying circuits 100 ₁ to 100 _(N) and causing the selectedamplifying circuit or other amplifying circuits to have a highimpedance.

FIG. 2 is a circuit diagram of a first example of the amplifyingcircuits 100 ₁ to 100 _(N) as a part of the gain-variable amplifyingcircuit 1000 in accordance with an embodiment of the present invention.

An amplifying circuit 100A in accordance with the first example is asingle-end type amplifying circuit.

As illustrated in FIG. 2, the amplifying circuit 100A is comprised of afirst inductor 201, a second inductor 203, a third inductor 204, afourth inductor 205, a fifth inductor 206, a resistor 202, a capacitor207, a first field effect transistor 208, a second field effecttransistor 209, and a third field effect transistor 210.

The first inductor 201 is electrically connected at one end to both theinput terminal IN and an end of the resistor 202, and at the other endto a gate of the first field effect transistor 208 and an end of thesecond inductor 203.

The resistor 202 is electrically connected at the above-mentioned endthereof to the input terminal IN and an end of the first inductor 201,and at the other end to a gate bias voltage Vgbias.

The second inductor 203 is electrically connected at the above-mentionedend thereof to the other and of the first inductor 201 and a gate of thefirst field effect transistor 208, and at the other end to a drain ofthe second field effect transistor 209.

The first field effect transistor 208 is electrically connected at agate thereof to the other end of the first inductor 201 and theabove-mentioned end of the second inductor 203, and at a drain thereofto ends of the third inductor 204, the fourth inductor 205 and the fifthinductor 206, and grounded at a source thereof.

A control voltage Vc is applied to a gate of the second field effecttransistor 209. The second field effect transistor 209 is electricallyconnected at a drain thereof to the other end of the second inductor203, and grounded at a source thereof.

The third inductor 204 is electrically connected at an end thereof toends of the fourth inductor 205 and the fifth inductor 206 and a drainof the first field effect transistor 208, and at the other end to adrain of the third field effect transistor 210.

A control voltage Vc is applied to a gate of the third field effecttransistor 210. The third field effect transistor 210 is electricallyconnected at a drain thereof to the other end of the third inductor 204,and grounded at a source thereof.

The fifth inductor 206 is electrically connected at an end thereof toends of the third inductor 204 and the fourth inductor 205 and a drainof the first field effect transistor 208, and receives a power-sourcevoltage Vdd at the other end thereof.

The fourth inductor 205 is electrically connected at an end thereof toends of the third inductor 204 and the fifth inductor 206 and a drain ofthe first field effect transistor 208, and at the other end to an end ofthe capacitor 207 and the output terminal OUT.

The capacitor 207 is electrically connected at the above-mentioned endthereof to the other end of the fourth inductor 205 and the outputterminal OUT, and grounded at the other end thereof.

The first inductor 201, the fourth inductor 205, the fifth inductor 206,and the capacitor 207 define an input/output matching circuit. Inaddition, the fifth inductor 206 acts also as a choke inductor. Theresistor 202 applies a gate bias to an input signal.

The first field effect transistor 208 acts as a main amplifying devicein the amplifying circuit 100A. The control voltage Vc is used to turnon or off the amplifying circuit 100A.

The second and third field effect transistors 209 and 210 both acting asa switching device and the second and third inductors 203 and 204 bothfor making resonation define a control circuit. The amplifying circuit100A is turned on or off by controlling the control circuit.

For instance, if the control voltage Vc is set a high level (forinstance, the power-source voltage Vdd), and the gate bias voltageVgbias is set equal to 0V, the amplifying circuit 100A is turned off. Asan alternative, if the control voltage Vc is set a low level (forinstance, 0V), and the gate bias voltage Vgbias is set equal to anoperational voltage, the amplifying circuit 100A is turned on. Herein,the operational voltage is defined as a gate bias voltage at which thefirst field effect transistor 208 operates as an amplifier.

When the amplifying circuit 100A is on, the amplifying circuit 100A iselectrically connected to both the input terminal IN and the outputterminal OUT, and amplifies a signal received through the input terminalIN and transmits the amplified signal to the output terminal OUT.

When the amplifying circuit 100A is off, the amplifying circuit 100A hasa high impedance in input and output thereof, and hence, the amplifyingcircuit 100A is electrically separated from both the input terminal INand the output terminal OUT.

FIG. 3 shows a principle as to why the amplifying circuit 100Aillustrated in FIG. 2 has a high impedance. Hereinbelow, the principleis explained with reference to FIG. 3.

FIG. 3(a) is a circuit diagram of an equivalent circuit of an input ofthe amplifying circuit 100A in the case that the control signal Vc isset a high level to turn the second and third field effect transistors209 and 210 are turned on, and the gate bias voltage Vgbias is set equalto 0V. FIG. 3(b) is a circuit diagram of an equivalent circuit of anoutput of the amplifying circuit 100A in the same case.

In FIG. 3(a), an inductor 301 corresponds to the first inductor 201, andan inductor 303 corresponds to the second inductor 203. In FIG. 3(b), aninductor 306, an inductor 305, a capacitor 307, and an inductor 304correspond to the fifth inductor 206, the fourth inductor 205, thecapacitor 207, and the third inductor 204, respectively.

In FIGS. 3(a) and 3(b), since the gate bias voltage Vgbias is set equalto 0V, the first field effect transistor 208 is off. Hence, viewing froma gate of the first field effect transistor 208 (FIG. 3(a)) or viewingfrom a drain of the same (FIG. 3(b)), the circuits illustrated in FIGS.3(a) and 3(b) have a capacity equal to a gate or drain capacity of anintrinsic semiconductor of a device, that is, the capacitor 320 or 321,respectively.

In the circuit illustrated in FIG. 3(a), the inductor 303 is designed tohave such an inductance that the inductor 303 and the capacitor 320resonate with each other in parallel. Similarly, in the circuitillustrated in FIG. 3(b), the inductor 304 is designed to have such aninductance that the inductor 304 and the capacitor 321 resonate witheach other in parallel. Thus, it is possible to make input and outputimpedances high.

The capacitors 320 and 321 have a capacity dependent on a generation ofa process and a gate size. For instance, the capacitors 320 and 321 haveabout 300 fF in a field effect transistor having a gate width of 300micrometers. If a capacity is equal to about 300 fF, the inductors 303and 304 in an amplifying circuit which operates at a frequency of 5 GHzhave an inductance of about 3 nH. Inductors having such an inductancecan be readily fabricated on an IC by wire arrangement.

When the amplifying circuit 100A is on and carries out normalamplification, the second and third field effect transistors 209 and 210are off. Since the second and third field effect transistors 209 and 210are not arranged in a signal path between the input terminal IN and theoutput terminal OUT, a resistance during they are off is set high.Furthermore, a shunt parasitic capacity during they are off is set low,resulting in a high impedance. Accordingly, when the second and thirdfield effect transistors 209 and 210 are off, the inductors 303 and 304are in a floating condition.

As having been explained above, it is possible in the amplifying circuit100A to make an input/output impedance high in a high-frequency bandbeyond GHz order without arranging a switch into a signal path.

Thus, in the gain-variable amplifying circuit 1000 including theamplifying circuits 1001 to 100N having the same structure as that ofthe amplifying circuit 100A and electrically connected in parallel withone another, even if a range in which a gain varies is set broad or evenif a step by which a gain varies is set narrow, it would be possible tomaintain a high gain and a low noise indication.

Furthermore, since it is possible to maintain a high gain in thegain-variable amplifying circuit 1000, even if a number of amplifyingcircuits electrically connected in parallel to one another is increased,it would be possible to avoid an increase in current consumption. Inparticular, the avoidance of an increase in current consumption isremarkable in a high-frequency band beyond GHz.

FIG. 4 is a circuit diagram of a second example of the amplifyingcircuits 100 ₁ to 100 _(N) as a part of the gain-variable amplifyingcircuit 1000 in accordance with the embodiment of the present invention.

The amplifying circuit 100B illustrated in FIG. 4 is structurallydifferent from the amplifying circuit 100A illustrated in FIG. 2 inincluding a fourth field effect transistor 400 acting as a secondamplifier. The first field effect transistor 208 acting as a firstamplifier, and the fourth field effect transistor 400 are electricallyconnected in cascode to each other.

A first control voltage VcA is applied to a gate of the fourth fieldeffect transistor 400. The fourth field effect transistor 400 has adrain electrically connected to ends of the third inductor 204, thefourth inductor 205 and the fifth inductor 206, and a sourceelectrically connected to a drain of the first field effect transistor208.

A second control voltage VcB is applied to each of gates of the secondand third field effect transistors 209 and 210.

The first and fifth field effect transistors 208 and 400 are mainamplifying devices in the amplifying circuit 100B.

The first and second control voltages VcA and VcB are used for turningon or off the amplifying circuit 100B, and are complementary with eachother.

The second and third field effect transistors 209 and 210 and the secondand third inductors 203 and 204 define a control circuit. The amplifyingcircuit 100B is turned on or off by controlling the control circuit.

For instance, if the first control voltage VcA is set a low level andthe second control voltage VcB is set a high level, and the gate biasvoltage Vgbias is set equal to 0V, the amplifying circuit 100B is turnedoff. On the other hand, if the first control voltage VcA is set a highlevel and the second control voltage VcB is set a low level, and thegate bias voltage Vgbias is set equal to an operational voltage, theamplifying circuit 100B is turned on. Herein, the operational voltage isdefined as a gate bias voltage at which the first field effecttransistor 208 operates as an amplifier.

When the amplifying circuit 100B is on, the amplifying circuit 100B iselectrically connected to both the input terminal IN and the outputterminal OUT, and amplifies a signal received through the input terminalIN and transmits the amplified signal to the output terminal OUT.

When the amplifying circuit 100B is off, the amplifying circuit 100B hasa high impedance in input and output thereof, and hence, the amplifyingcircuit 100B is electrically separated from both the input terminal INand the output terminal OUT.

A principle in accordance with which the amplifying circuit 100B is in ahigh-impedance condition is identical with the principle in accordancewith which the amplifying circuit 100A illustrated in FIG. 2 is in ahigh-impedance condition.

In the amplifying circuit 100B, since the field effect transistors 208and 400 are electrically connected in cascode to each other, a capacitybetween the input terminal IN and the output terminal OUT is smallerthan the same in the amplifying circuit 100A, ensuring that theamplifying circuit 100B can operate in a higher frequency band than thesame of the amplifying circuit 100B illustrated in FIG. 2.

FIG. 5 is a circuit diagram of a third example of the amplifyingcircuits 100 ₁ to 100 _(N) as a part of the gain-variable amplifyingcircuit 1000 in accordance with the embodiment of the present invention.

The amplifying circuit 100C illustrated in FIG. 5 is structurallydifferent from the amplifying circuit 100B illustrated in FIG. 4 infurther including a fifth field effect transistor 401 acting as acurrent breaker.

The fifth field effect transistor 401 is electrically connected inseries between the matching inductor 206 and the power-source voltageVdd. Specifically, the fifth field effect transistor 401 has a gate towhich a second control voltage VcB is applied, a drain to which thepower-source voltage Vdd is applied, and a source electrically connectedto an end of the fifth inductor 206.

The fifth field effect transistor 401 interrupts a current flow from thepower source to the amplifying circuit 100C, when the amplifying circuit100C is off.

FIG. 6 is a circuit diagram of a fourth example of the amplifyingcircuits 100 ₁ to 100 _(N) as a part of the gain-variable amplifyingcircuit 1000 in accordance with the embodiment of the present invention.

The amplifying circuit 100D illustrated in FIG. 6 is structurallydifferent from the amplifying circuit 100C illustrated in FIG. 5 in theamplifying circuit 100D is comprised of a differential amplifyingcircuit, and in further including a sixth field effect transistor 613acting as a constant-current source.

The amplifying circuit 100D has a basic circuit structure identical withthat of the amplifying circuit 100C illustrated in FIG. 5. However, theparts constituting the amplifying circuit 100C are replaced with otherparts as follows in the amplifying circuit 100D except the fifth fieldeffect transistor 401.

The first inductor 201 is replaced with a pair of inductors 601 a and601 b arranged in parallel with each other. The resistor 202 is replacedwith a pair of resistors 602 a and 602 b electrically connected to theinductors 601 a and 601 b, respectively. The second inductor 203 isreplaced with a pair of inductors 603 a and 603 b. The second fieldeffect transistor 209 is replaced with a pair of field effecttransistors 609 a and 609 b.

The fifth inductor 206 is replaced with a pair of inductors 606 a and606 b. The fourth field effect transistor 400 is replaced with a pair offield effect transistors 611 a and 611 b. The first field effecttransistor 208 is replaced with a pair of field effect transistors 608 aand 608 b. The third inductor 204 is replaced with a pair of inductors604 a and 604 b. The third field effect transistor 210 is replaced witha pair of field effect transistors 610 a and 610 b.

The fourth inductor 205 is replaced with a pair of inductors 605 a and605 b. The capacitor 207 is replaced with a pair of capacitors 607 a and607 b.

The sixth field effect transistor 613 is arranged between sources of thefirst field effect transistors 608 a and 608 b both acting as anamplifier, and a grounded voltage. Specifically, the sixth field effecttransistor 613 has a gate to which a gate bias voltage Vs as anoperational voltage is applied, a drain electrically connected tosources of the first field effect transistors 608 a and 608 b, and asource grounded.

When the gate bias voltage Vgbias applied to the gates of the firstfield effect transistors 608 a and 608 b, and the gate bias voltage Vsapplied to the gate of the sixth field effect transistor 613 are setequal to an operational voltage, and the control voltage VcA is setequal to a high level, the fourth field effect transistors 211 a and 211b and the fifth field effect transistor 401 are turned on, and thesecond field effect transistors 609 a and 609 b and the third fieldeffect transistors 610 a and 610 b are turned off. As a result, thesecond inductors 603 a and 603 b and the third inductors 604 a and 604are put into a floating condition, and hence, the amplifying circuit100D carries out amplification.

In contrast, when the control voltage VcA is set equal to a low level,the fourth field effect transistor 611 a and 611 b and the fifth fieldeffect transistor 401 are turned off, and the second field effecttransistors 609 a and 609 b and the third field effect transistors 610 aand 610 b are turned on. The second inductors 603 a and 603 b and thethird inductors 604 a and 604 b are grounded, and resonate in parallelwith capacities of the second field effect transistors 609 a and 609 band the third field effect transistors 610 a and 610 b. As a result, theamplifying circuit 100D has a high input/output impedance.

FIG. 7 is a circuit diagram of a fifth example of the amplifyingcircuits 100 ₁ to 100 _(N) as a part of the gain-variable amplifyingcircuit 1000 in accordance with the embodiment of the present invention.

The amplifying circuit 100E illustrated in FIG. 7 is comprised oftransmission lines.

As illustrated in FIG. 7, the amplifying circuit 100E is comprised of afirst transmission line 721, a second transmission line 722, a thirdtransmission line 723, a first field effect transistor 720, a secondfield effect transistor 724, a third field effect transistor 725, and anoutput matching circuit 726.

The first transmission line 721 is connected at one end thereof to theinput terminal IN, and at the other end thereof to an end of the secondtransmission line 722 and a gate of the first field effect transistor720.

The second transmission line 722 is connected at one end thereof to theother end of the first transmission line 721 and a gate of the firstfield effect transistor 720, and at the other end thereof to drains ofthe second and third field effect transistors 724 and 725.

The third transmission line 723 is connected at one end thereof to asource of the second field effect transistor 724, and at the other endthereof grounded.

The first field effect transistor 720 has a gate electrically connectedto the other end of the first transmission line 721 and one end of thesecond transmission line 722, a drain electrically connected to theoutput terminal OUT through the output matching circuit 726, and asource grounded.

The second field effect transistor 724 has a gate to which a secondcontrol voltage VcB is applied, a drain electrically connected to theother end of the second transmission line 722 and a drain of the thirdfield effect transistor 725, and a source electrically connected to oneend of the third transmission line 723.

The third field effect transistor 725 has a gate to which a firstcontrol voltage VcA is applied, a drain electrically connected to theother end of the second transmission line 722 and a drain of the secondfield effect transistor 724, and a source grounded. The first and secondcontrol voltages VcA and VcB are complementary with each other.

The first transmission line 721 matches inputs, and the output matchingcircuit 726 matches outputs. The first field effect transistor 720 actsas a main amplifying device in the amplifying circuit 100E.

The second transmission line 722 has a length shorter than a quarter (¼)of a wavelength of a signal to which the amplifying circuit 100E isapplied. Thus, the second transmission line 722 acts as an inductor. Thelength of the second transmission line 722 is designed to be such alength that an inductance of the second transmission line 722 and a gatecapacity of the first field effect transistor 720 resonate in parallelwith each other.

Each of the second and third transmission lines 722 and 723 is designedto have such a length that a total of the length of them is equal to aquarter (¼) or K quarter (K/4) of a wavelength of a signal to which theamplifying circuit 100E is applied, wherein K indicates an odd number.

For simplification, an operation of the amplifying circuit 100E isexplained hereinbelow only with respect to inputs thereof.

Each of the second and third field effect transistors 724 and 725defines a single-pole single-throw (SPST) switch. The second and thirdfield effect transistors 724 and 725 are controlled by the first andsecond control voltages VcA and VcB which are complementary with eachother, respectively.

When the first control voltage VcA is set a high level, and the secondcontrol voltage VcB is set a low level, the second field effecttransistor 724 is off, and the third field effect transistor 725 is on.Thus, the third transmission line 723 is electrically separated from theamplifying circuit 100E, and the second transmission line 722 isdirectly grounded. Since the second transmission line 722 has a lengthshorter than a quarter of the wavelength, the second transmission line722 acts as an inductor, and further since an inductance of the inductoris designed to resonate in parallel with a gate capacity of the firstfield effect transistor 720, the amplifying circuit 100E is in ahigh-impedance condition, when viewed from the input terminal IN.

In contrast, when the first control voltage VcA is set a low level, andthe second control voltage VcB is set a high level, the second fieldeffect transistor 724 is on, and the third field effect transistor 725is off. Thus, the third transmission line 723 is electrically connectedto the second transmission line 722 through the second field effecttransistor 724.

Since a total length of the second and third transmission lines 722 and723 is equal to a quarter of the wavelength of the signal, and the thirdtransmission line 723 is grounded at the other end, the impedance isinfinite, resulting in that the second and third transmission lines 722and 723 seems to have an infinite impedance, when viewed from a gate ofthe first field effect transistor 720. The second and third transmissionlines 722 and 723 which seem to have an infinite impedance do not exertany influence on a gate of the first field effect transistor 720.Accordingly, the amplifying circuit 100E normally carries outamplification without being influenced by the second and thirdtransmission lines 722 and 723.

It is necessary to set a gate bias voltage such that the first fieldeffect transistor 720 does not carry out amplification, when the firstcontrol voltage VcA is set a high level, and the second control voltageVcB is set a low level.

Hereinbelow, the above-mentioned amplifying circuits 100A to 100E arecompared with a conventional amplifying circuit with respect toperformances.

FIG. 8(a) is a circuit diagram of a gain-variable amplifying circuitincluding any one of the above-mentioned amplifying circuits 100A to100E, and FIG. 8(b) is a circuit diagram of a conventional gain-variableamplifying circuit.

The gain-variable amplifying circuit illustrated in FIG. 8(a) iscomprised of an amplifying circuit 832, an amplifying circuit 830electrically connected in series to an output of the amplifying circuit832, and an attenuator 831 electrically connected in series to an outputof the amplifying circuit 832 and in parallel with the amplifyingcircuit 830.

The amplifying circuit 830 is designed to define a resonance circuitcomprised of a gate capacity of a field effect transistor acting as anamplifier, and an inductor, by switching a field effect transistoracting as a switch. When the amplifying circuit 830 defines theresonance circuit, the amplifying circuit 830 would have a highimpedance in input/output thereof, resulting in that the amplifyingcircuit 830 is electrically separated from the gain-variable amplifyingcircuit.

Specifically, the amplifying circuit 830 is comprised of any one of theabove-mentioned amplifying circuits 100A to 100E.

The gain-variable amplifying circuit illustrated in FIG. 8(b) iscomprised of, similarly to the gain-variable amplifying circuitillustrated in FIG. 8(a), an amplifying circuit 832, an amplifyingcircuit 830 electrically connected in series to an output of theamplifying circuit 832, and an attenuator 831 electrically connected inseries to an output of the amplifying circuit 830 and in parallel withan amplifying circuit 833.

Unlike the amplifying circuit 830, the amplifying circuit 833 isdesigned to be electrically connected to the gain-variable amplifyingcircuit by turning on a field effect transistor acting as a switch andarranged in a signal path.

It is assumed that the gain-variable amplifying circuits illustrated inFIGS. 8(a) and 8(b) are applied to a signal having a frequency in a 5GHz band, and are designed to have a predetermined inductance.

FIG. 9 is a graph showing a relation between a frequency and a gain inthe gain-variable amplifying circuits illustrated in FIGS. 8(a) and8(b).

FIG. 9 shows the gain characteristic found when the amplifying circuits830 and 833 are electrically connected to the gain-variable amplifyingcircuit (high-gain operation), and the gain characteristic found whenthe amplifying circuits 830 and 833 are electrically separated from thegain-variable amplifying circuit (low-gain operation).

FIG. 10 is a graph showing a relation between a frequency and a noiseindication in the gain-variable amplifying circuits illustrated in FIGS.8(a) and 8(b).

In FIGS. 9 and 10, the characteristic of the gain-variable amplifyingcircuit illustrated in FIG. 8(a) is shown with a solid line, and thecharacteristic of the gain-variable amplifying circuit illustrated inFIG. 8(b) is shown with a broken line.

With reference to FIG. 9, a gain in the high-gain operation in thegain-variable amplifying circuit illustrated in FIG. 8(a) is higher byabout 5 dB than the same in the gain-variable amplifying circuitillustrated in FIG. 8(b).

With reference to FIG. 10, a noise indication in the gain-variableamplifying circuit illustrated in FIG. 8(a) is lower by about 0.2 dBthan the same in the gain-variable amplifying circuit illustrated inFIG. 8(b). This is because there is caused a loss due to a signal in afield effect transistor arranged in a signal path as a switch, in thegain-variable amplifying circuit illustrated in FIG. 8(b). If the lossis compensated for by increasing a gain of the gain-variable amplifyingcircuit, current consumption would be increased by about 50%. In otherwords, the gain-variable amplifying circuit illustrated in FIG. 8(a) canreduce power consumption by 50% in comparison with the gain-variableamplifying circuit illustrated in FIG. 8(b).

With reference to FIG. 9, a gain in the low-gain operation in thegain-variable amplifying circuit illustrated in FIG. 8(a) is almostequal to the same in the gain-variable amplifying circuit illustrated inFIG. 8(b). This is because the amplifying circuits 830 and 833 aresufficiently electrically separated from the gain-variable amplifyingcircuit. That is, the amplifying circuit is in a high-impedancecondition with respect to input/output thereof.

INDUSTRIAL APPLICABILITY

In accordance with the present invention, the control circuit makesinput and/or output impedances high. Hence, it would be possible toswitch electrical connection to disconnection and vice versa withoutarranging a switch into a signal path. Furthermore, it would be possibleto accomplish a high gain in low power consumption without a loss causedby arranging a switch into a signal path.

In addition, since it is possible to cancel reduction in an impedance ina high-frequency band, caused by a parasitic capacity in an amplifyingdevice, with an inductance device, it would be possible to accomplish ahigh impedance in a high-frequency band. Furthermore, since it ispossible to cancel reduction in an impedance with an inductance devicewhich resonate in parallel with a parasitic capacity at a certainfrequency, it would be possible to accomplish a high impedance at thecertain frequency.

The gain-variable amplifying circuit in accordance with the presentinvention makes input/output impedance high, when an amplifyingcircuit(s) constituting the gain-variable amplifying circuit is(are) notselected. Hence, it is possible to maintain a high gain, regardless of anumber of amplifying circuits electrically connected in parallel withone another, ensuring that there are accomplished a high gain, a lownoise indication, and low current consumption, even in a broad band inwhich a gain varies, or even at a narrow step by which a gain varies

1. An amplifying circuit comprising: an amplifier amplifying a signalreceived through an input terminal, and outputting the signal through anoutput terminal; and a control circuit turning at least one of an inputimpedance and an output impedance of said amplifier into a highimpedance.
 2. The amplifying circuit as set forth in claim 1, whereinsaid control circuit is comprised of an inductor and a switch.
 3. Theamplifying circuit as set forth in claim 2, wherein said inductor andsaid switch are electrically connected in series to each other, andfurther electrically connected in an AC manner between said input oroutput terminal and a grounded voltage.
 4. The amplifying circuit as setforth in claim 3, wherein said switch is comprised of a field effecttransistor.
 5. The amplifying circuit as set forth in claim 3, whereinsaid inductor has an inductance resonating in parallel with a parasiticcapacity of said amplifier.
 6. The amplifying circuit as set forth inclaim 1, wherein said control circuit is comprised of: at least twotransmission lines including at least a first transmission lineelectrically connected at one end thereof to said input or outputterminal, and a second transmission line grounded at one end thereof, atotal length of said at least two transmission lines being equal to K×Swherein K indicates an odd number, and S indicates a quarter of awavelength of said signal; and a switch for selecting whether said inputor output terminal is electrically connected to a grounded voltagethrough a transmission line having a length of K×S or through atransmission line having a length shorter than K×S.
 7. The amplifyingcircuit as set forth in claim 6, wherein said transmission line having alength shorter than K×S acts as an inductor having an inductanceresonating in parallel with a parasitic capacity of said amplifier. 8.The amplifying circuit as set forth in claim 1, wherein said amplifieris comprised of two field effect transistors electrically connected incascode to each other.
 9. The amplifying circuit as set forth in claim1, further comprising a field effect transistor electrically connectedin series between said amplifier and a power source, said field effecttransistor interrupting a current from flowing to said amplifyingcircuit from said power source when said amplifying circuit is off. 10.The amplifying circuit as set forth in claim 1, wherein said amplifyingcircuit is comprised of a differential amplifying circuit, and furthercomprising a field effect transistor as a constant-current sourcebetween said amplifier and a grounded voltage.
 11. A gain-variableamplifying circuit comprising at least two amplifying circuitselectrically connected in parallel to each other and having gainsdifferent from one another, said amplifying circuits each comprised ofan amplifier amplifying a signal received through an input terminal, andoutputting the signal through an output terminal; and a control circuitturning at least one of an input impedance and an output impedance ofsaid amplifier into a high impedance, wherein a gain is controlled byturning at least one of said input and output impedances of anamplifying circuit(s) other than a selected amplifying circuit, into ahigh impedance.
 12. The gain-variable amplifying circuit as set forth inclaim 11, wherein said control circuit is comprised of an inductor and aswitch.
 13. The gain-variable amplifying circuit as set forth in claim12, wherein said inductor and said switch are electrically connected inseries to each other, and further electrically connected in an AC mannerbetween said input or output terminal and a grounded voltage.
 14. Thegain-variable amplifying circuit as set forth in claim 13, wherein saidswitch is comprised of a field effect transistor.
 15. The gain-variableamplifying circuit as set forth in claim 13, wherein said inductor hasan inductance resonating in parallel with a parasitic capacity of saidamplifier.
 16. The gain-variable amplifying circuit as set forth inclaim 11, wherein said control circuit is comprised of: at least twotransmission lines including at least a first transmission lineelectrically connected at one end thereof to said input or outputterminal, and a second transmission line grounded at one end thereof, atotal length of said at least two transmission lines being equal to K×Swherein K indicates an odd number, and S indicates a quarter of awavelength of said signal; and a switch for selecting whether said inputor output terminal is electrically connected to a grounded voltagethrough a transmission line having a length of K×S or through atransmission line having a length shorter than K×S.
 17. Thegain-variable amplifying circuit as set forth in claim 16, wherein saidtransmission line having a length shorter than K×S acts as an inductorhaving an inductance resonating in parallel with a parasitic capacity ofsaid amplifier.
 18. The gain-variable amplifying circuit as set forth inclaim 11, wherein said amplifier is comprised of two field effecttransistors electrically connected in cascode to each other.
 19. Thegain-variable amplifying circuit as set forth in claim 11, furthercomprising a field effect transistor electrically connected in seriesbetween said amplifier and a power source, said field effect transistorinterrupting a current from flowing to said amplifying circuit from saidpower source when said amplifying circuit is off.
 20. The gain-variableamplifying circuit as set forth in claim 11, wherein said amplifyingcircuit is comprised of a differential amplifying circuit, and furthercomprising a field effect transistor as a constant-current sourcebetween said amplifier and a grounded voltage.